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MRF89XA
2.1 Power Supply and Ground Block
Pins
To provide stable sensitivity and linearity
characteristics over a wide supply range, the
MRF89XA is internally voltage regulated. This internal
regulated power supply block structure is illustrated in
Figure 2-2 .
The power supply bypassing is essential for better
handling of signal surges and noise in the power line.
To ensure correct operation of the regulator circuit, the
decoupling capacitor connection (shown in Figure 2-2 )
is recommended. These decoupling components are
recommended for any design. The power supply block
generates four regulated supplies for the analog,
digital, VCO and the PLL blocks to reduce the voltages
for their specific requirements. However, Power-on
Reset (POR), Configuration registers and the SPI use
the V DD supply given to the MRF89XA.
The large value decoupling capacitors should be
placed at the PCB power input. The smaller value
decoupling capacitors should be placed at every power
point of the device and at bias points for the RF port.
Poor bypassing can lead to conducted interference,
which can cause noise and spurious signals to couple
into the RF sections, thereby significantly reducing the
performance.
It is recommended that the V DD pin have two bypass
capacitors to ensure sufficient bypass and decoupling.
However, based on the selected carrier frequency, the
bypass capacitor values vary. The trace length (V DD pin
to bypass capacitors) should be made as short as
possible.
FIGURE 2-2:
POWER SUPPLY BLOCK DIAGRAM
V BAT
1 μF
Y5V
V DD – Pin 26
2.1 – 3.6V
External Supply
Internal Regulator
1.4 V
V INTS
Biasing:
- SPI
- Config. Registers
- POR
Analog Regulator
1.0 V
Biasing Analog
Blocks
AVRS
Pin 27
1 μF
Y5V
Digital Regulator
1.0 V
Biasing Digital
Blocks
DVRS
Pin 28
0.22 μF
X7R
VCO Regulator
0.85 V
Biasing:
- VCO Circuit
- Ext. VCO Tank
VCORS
Pin 3
0.1 μF
X7R
PA Regulator
1.80 V
Biasing:
- PA Driver
- Ext. PA Choke
PARS
Pin 29
0.047 μF
X7R
TABLE 2-2:
POWER SUPPLY PIN DETAILS
Blocks
POR, SPI and Configuration Registers
Regulated Supply (V INTS )
Analog
Digital
VCO
PA
Biasing Through
V DD
V DD
V INTS
V INTS
V INTS
V DD
Associated Pins
V DD
V DD
AVRS
DVRS
VCORS
PARS
Regulated Voltage
(in Volts)
2.1–3.6
1.4
1.0
1.0
0.85
1.8
DS70622C-page 14
Preliminary
? 2010–2011 Microchip Technology Inc.
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